Extended Keyboard Processing for Hack Computer with Logisim : Part IV
In this fourth video in the sub-series of building a keyboard interface for the Hack Computer, I add extended key processing for decoding keyboard input (like for arrow keys, the home key, etc.). I then use the simulation features in Logisim to fake out sending what a keyboard would send in order to test the design.
You should watch the linked Ben Eater PS/2 Keyboard video before watching my video.
FAIR USE NOTICE This video may make use of copyrighted material. Its use may not have been specifically authorized by the copyright owner. Its application constitutes a fair use of any such copyrighted material as provided for in section 107 of the US Copyright Law. In accordance with Title 17 U.S.C. Section 107, this material is offered publicly and without profit to the users of the Internet for comment and nonprofit educational and informational purposes. ... https://www.youtube.com/watch?v=MdWEXneD--M
Using Logisim Evolution, I continue testing out the Hack CPU described in chapter 5 of The Elements of Computing Systems. I use the second test program in the chapter, Max.hack. This tests a few of the conditional comparisons/jump instructions. I show the binary of the program, disassemble it, load it into ROM, and demonstrate the CPU execute the program properly. I assume you have read chapter 4 of the book which covers the machine language of the Hack platform.
Resources:
https://github.com/logisim-evolution/logisim-evolution#download
https://mitpress.mit.edu/9780262539807/the-elements-of-computing-systems/
https://www.nand2tetris.org/software
FAIR USE NOTICE
This video may make use of copyrighted material. Its use may not have been specifically authorized by the copyright owner. Its application constitutes a fair use of any such copyrighted material as provided for in section 107 of the US Copyright Law. In accordance with Title 17 U.S.C. Section 107, this material is offered publicly and without profit to the users of the Internet for comment and nonprofit educational and informational purposes.
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https://www.youtube.com/watch?v=V733pjQXaj8
This is the fifth video in a sub-series on building a VGA interface for the HackCPU computer using Logisim Evolution. I build a pixel generator which fetches bits from RAM and displays them to a VGA monitor, in preparation to put the VGA interface under Hack computer control. I demonstrate a test circuit connected to ROM running on a Digilent CMOD A7.
The first VGA intro video of the series is: https://www.youtube.com/watch?v=w4vrNSY9cxY
The second VGA video of the series that describe construction of the sync pulse generator is: https://youtu.be/w4vrNSY9cxY
The third VGA video of the series describes the porch and margin generator is: https://youtu.be/Z4Ph6Jo67Y0
Resources:
https://github.com/logisim-evolution/logisim-evolution#download
https://mitpress.mit.edu/9780262539807/the-elements-of-computing-systems/
https://tomverbeure.github.io/video_timings_calculator
https://digilent.com/shop/cmod-a7-35t-breadboardable-artix-7-fpga-module/
https://digilent.com/shop/software/digilent-adept/
https://www.amazon.com/gp/product/B08FYPTWDQ/ref=ppx_yo_dt_b_asin_title_o09_s03?ie=UTF8&psc=1
You will need the develop branch from Logisim Evolution in order to pick up the board design for the CMOD A7, as well as obtain the clock synthesis feature I added to Logisim, until such time as my changes make it into a Logisim release.
You will need the Vivado product from Xilinx to synthesize the design for the Digilent board. It's huge, but free (if you give your information). Sorry. I did not write it.
https://www.xilinx.com/support/download.html
FAIR USE NOTICE
This video may make use of copyrighted material. Its use may not have been specifically authorized by the copyright owner. Its application constitutes a fair use of any such copyrighted material as provided for in section 107 of the US Copyright Law. In accordance with Title 17 U.S.C. Section 107, this material is offered publicly and without profit to the users of the Internet for comment and nonprofit educational and informational purposes.
...
https://www.youtube.com/watch?v=5xgZrheH-hU
Learn about the RISC-V instruction set architecture by building hardware. In this video, I use Logisim to build a 32-bit register file that will eventually be incorporated into an RV32I CPU that can be synthesized on to an FPGA.
There are a number of resources that I recommend you study as you go on this journey with me:
RISC-V Green Sheet: https://inst.eecs.berkeley.edu/~cs61c/su18/img/riscvcard.pdf
Design of the RISC-V Instruction Set Architecture: https://digitalassets.lib.berkeley.edu/techreports/ucb/text/EECS-2016-1.pdf
Great Ideas in Computer Architecture (week 2 and 4): https://inst.eecs.berkeley.edu/~cs61c/su18/
Other helpful resources:
Online RISC-V assembler: https://riscvasm.lucasteske.dev
Logisim Evolution: https://github.com/logisim-evolution/logisim-evolution/releases
...
https://www.youtube.com/watch?v=ykpJhHlVSZ0
This is the fourth video in a sub-series on building a VGA interface for the HackCPU computer using Logisim Evolution. I discuss the schematic and electrical theory behind creating it and use a test pattern component to demonstrate the driver interface working on a VGA monitor. I demonstrate the circuit running on a Digilent CMOD A7.
The first VGA intro video of the series is: https://www.youtube.com/watch?v=w4vrNSY9cxY
The second VGA video of the series that describe construction of the sync pulse generator is: https://youtu.be/w4vrNSY9cxY
The third VGA video of the series describes the porch and margin generator is: https://youtu.be/Z4Ph6Jo67Y0
Resources:
https://github.com/logisim-evolution/logisim-evolution#download
https://mitpress.mit.edu/9780262539807/the-elements-of-computing-systems/
https://tomverbeure.github.io/video_timings_calculator
https://digilent.com/shop/cmod-a7-35t-breadboardable-artix-7-fpga-module/
https://digilent.com/shop/software/digilent-adept/
https://www.amazon.com/gp/product/B08FYPTWDQ/ref=ppx_yo_dt_b_asin_title_o09_s03?ie=UTF8&psc=1
You will need the develop branch from Logisim Evolution in order to pick up the board design for the CMOD A7, as well as obtain the clock synthesis feature I added to Logisim, until such time as my changes make it into a Logisim release.
You will need the Vivado product from Xilinx to synthesize the design for the Digilent board. It's huge, but free (if you give your information). Sorry. I did not write it.
https://www.xilinx.com/support/download.html
FAIR USE NOTICE
This video may make use of copyrighted material. Its use may not have been specifically authorized by the copyright owner. Its application constitutes a fair use of any such copyrighted material as provided for in section 107 of the US Copyright Law. In accordance with Title 17 U.S.C. Section 107, this material is offered publicly and without profit to the users of the Internet for comment and nonprofit educational and informational purposes.
...
https://www.youtube.com/watch?v=F0SHF2wYbl8
Learn about the RISC-V instruction set architecture by building hardware. In this video, I use Logisim to build the Immediate Generator that will eventually be incorporated into an RV32I CPU that can be synthesized on to an FPGA.
There are a number of resources that I recommend you study as you go on this journey with me:
RISC-V Reference Card: https://www.cl.cam.ac.uk/teaching/1617/ECAD+Arch/files/docs/RISCVGreenCardv8-20151013.pdf
Design of the RISC-V Instruction Set Architecture: https://digitalassets.lib.berkeley.edu/techreports/ucb/text/EECS-2016-1.pdf
Great Ideas in Computer Architecture (week 2 and 4): https://inst.eecs.berkeley.edu/~cs61c/su18/
RISC-V Specification: https://riscv.org/wp-content/uploads/2019/12/riscv-spec-20191213.pdf
Other helpful resources:
Online RISC-V assembler: https://riscvasm.lucasteske.dev
Logisim Evolution: https://github.com/logisim-evolution/logisim-evolution/releases
...
https://www.youtube.com/watch?v=dVBh6-hLXNI
Learn about the RISC-V instruction set architecture by building hardware. In this video, I use Logisim to build a datapath for register to register instructions and some control logic using logic gates.
Control logic can be built with logic gates but there is another technique that I will use for the remainder of the series that I find more convenient. But I think it made sense to see it done this way first.
I highly recommend you watching the videos on this playlist to this point and I use many of the modules built to date:
https://www.youtube.com/watch?v=Z7LHCMTc0gI&list=PLM8YDhk_PWu0pdBNHMMSiBm8CEkCQ94T8&pp=gAQBiAQB
There are a number of resources that I recommend you study as you go on this journey with me:
RISC-V Reference Card: https://www.cs.sfu.ca/~ashriram/Courses/CS295/assets/notebooks/RISCV/RISCV_GREEN_CARD.pdf
Design of the RISC-V Instruction Set Architecture: https://digitalassets.lib.berkeley.edu/techreports/ucb/text/EECS-2016-1.pdf
Great Ideas in Computer Architecture (week 2 and 4): https://inst.eecs.berkeley.edu/~cs61c/su18/
RISC-V Specification: https://riscv.org/wp-content/uploads/2019/12/riscv-spec-20191213.pdf
Partial Truth Table: https://docs.google.com/spreadsheets/d/1vEK9cUZK4V5SEFH1DbEvg8QJjkaMn-dQ8DxfBNaIYIs/edit?usp=sharing
Other helpful resources:
Online RISC-V assembler: https://riscvasm.lucasteske.dev
Logisim Evolution: https://github.com/logisim-evolution/logisim-evolution/releases
...
https://www.youtube.com/watch?v=iRoeek_LVKI
Learn about the RISC-V instruction set architecture by building hardware. In this video, I use Python to code a conversion from my Google Sheets control truth table to a Logisim ROM import file so I can automate control logic loading.
I highly recommend you watch the videos on this playlist to this point as I use many of the modules built to date:
https://www.youtube.com/watch?v=Z7LHCMTc0gI&list=PLM8YDhk_PWu0pdBNHMMSiBm8CEkCQ94T8&pp=gAQBiAQB
There are a number of resources that I recommend you study as you go on this journey with me:
RISC-V Reference Card: https://www.cs.sfu.ca/~ashriram/Courses/CS295/assets/notebooks/RISCV/RISCV_GREEN_CARD.pdf
Design of the RISC-V Instruction Set Architecture: https://digitalassets.lib.berkeley.edu/techreports/ucb/text/EECS-2016-1.pdf
Great Ideas in Computer Architecture (week 2 and 4): https://inst.eecs.berkeley.edu/~cs61c/su18/
RISC-V Specification: https://riscv.org/wp-content/uploads/2019/12/riscv-spec-20191213.pdf
Partial Truth Table: https://docs.google.com/spreadsheets/d/1vEK9cUZK4V5SEFH1DbEvg8QJjkaMn-dQ8DxfBNaIYIs/edit?usp=sharing
Other helpful resources:
Online RISC-V assembler: https://riscvasm.lucasteske.dev
Logisim Evolution: https://github.com/logisim-evolution/logisim-evolution/releases
...
https://www.youtube.com/watch?v=EwxU4F3i-fY
In this fifth video in the sub-series of building a keyboard interface for the Hack Computer, I synthesize and test the keyboard circuit built in prior videos. Of course, it did not work the first time and I walk through my foibles. I also discuss electrical characteristics of the PS2 keyboard and build a 5V to 3.3V level-shift circuit to lower clock and data input voltages to levels that will not damage the FPGA.
Resources:
https://github.com/logisim-evolution/logisim-evolution#download
https://mitpress.mit.edu/9780262539807/the-elements-of-computing-systems/
https://digilent.com/shop/cmod-a7-35t-breadboardable-artix-7-fpga-module/
https://digilent.com/shop/software/digilent-adept/
Many thanks for the terrific circuit simulator: https://falstad.com
You will need the develop branch from Logisim Evolution in order to pick up the board design for the CMOD A7, until such time as my changes make it into a Logisim release.
You will need the Vivado product from Xilinx to synthesize the design for the Digilent board. It's huge, but free (if you give your information). Sorry. I did not write it.
https://www.xilinx.com/support/download.html
You will also need a PS2 keyboard and connector break-out of some type. I got mine at a second-hand electronics shop in Salem, OR. Shout out to Norvac Electronics: https://norvac-electronic-parts.business.site/
But if you want to buy one new, try: https://www.adafruit.com/product/857
FAIR USE NOTICE
This video may make use of copyrighted material. Its use may not have been specifically authorized by the copyright owner. Its application constitutes a fair use of any such copyrighted material as provided for in section 107 of the US Copyright Law. In accordance with Title 17 U.S.C. Section 107, this material is offered publicly and without profit to the users of the Internet for comment and nonprofit educational and informational purposes.
...
https://www.youtube.com/watch?v=TrrtudDyJd0