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1 Nov 2021 22:35:44 UTC
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VLSI CAD: Logic to Layout Lecture 027 Logic Synthesis - Implicit Dont Cares Part 2
Course is presented by professor Rob A. Rutenbar is the Abel Bliss Professor and Head of the Department of Computer Science (CS) at the University of Illinois at Urbana-Champaign. He is an affiliate Professor in ECE at Illinois
For more information register here
https://www.coursera.org/course/vlsicad
...
https://www.youtube.com/watch?v=1Kuit2GgHQY
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